Electrical systems often include semiconductor devices with very demanding power requirements (e.g. providing for high current transients with stable voltage over a wide frequency range). It is desirable to know information about the electrical characteristics of the power distribution system (“PDS”) that provides electrical power to the semiconductor device. For purposes of discussion, the term “device” refers to a packaged semiconductor device, and “die” refers to the semiconductor die (“chip”) within the packaged device. “PDS” refers to the greater PDS, which includes not only the output ports of power supply, but also the printed circuit board (“PCB”), additional components mounted on the PCB, and the package of the semiconductor device. Factors that can affect the performance of the PDS include voltage regulators, decoupling capacitors, power planes and sandwiches, power vias, solder lands, device package balls, package substrate planes and vias, and similar elements. The impedance of the PDS over all frequencies of interest (i.e. the frequencies at which the semiconductor device requires transient current, such as when several switching operations simultaneously occur in the semiconductor device, as well as steady-state direct current (“DC”)) is frequently used as a figure of merit of the PDS.
Conventional techniques for accurately determining the relevant impedance have several drawbacks. One technique uses a network analyzer in either a 1-port or 2-port configuration to measure the impedance of a portion of the PDS. The network analyzer injects a stimulus into the network under test (i.e. the PDS) that sweeps all frequencies of interest while simultaneously measuring the reflected and/or transmitted energy. The PDS impedance can be derived from the reflected and/or transmitted energy.
This method uses test points on the PCB, whether built into the PCB solely for that purpose, or whether retrofitted to the PCB, such as when measurements are made through a pair of decoupling capacitor lands with the capacitor removed. However, even with the best of test points, this method does not provide an accurate measurement of the PDS impedance seen by the semiconductor die (i.e. at the chip) because it does not measure the portion of the PDS between the voltage present at the chip and the external test points. In particular, it does not measure parasitic contributions of the package and the portion of the PCB between the semiconductor device and the test points. Removing the lid of a packaged semiconductor device to expose interior test points on the die is impractical because it destroys the packaged device.
Another limitation of this method is that network analyzers are typically designed to measure impedance in the range of 50 ohms. A good PDS often has impedance in the range of tens or hundreds of milliohms, and sometimes much lower. It is difficult for a network analyzer designed to measure a 50-ohm system to accurately measure impedances orders of magnitude smaller.
Another technique measured high-frequency impedance of a power supply loop for a microprocessor using current switching in the microprocessor. The microprocessor was programmed to generate periodic, changing current draw containing relatively long DC fractions, one portion having low current draw (“cold”), and another portion having high current draw (“hot”). The hot portion contained four integer additions, and the cold portion had four integer no-ops per cycle. Test pads were provided on the package of the microprocessor to provide Vdd–Vss sensing. Calibrated sense resistors were used in series between the voltage regulation modules and the microprocessor to extract quiescent hot and cold Idd values. A digital oscilloscope was used to measure the voltages and process the data to provide impedance information. Many thousands of sweeps were taken with the oscilloscope and averaged to filter random noise.
While this approach avoids the limitations of measuring the PDS in a 50-ohm test system, it still does not account for the impedance of the PDS generated by the portion of the network between the test pads and the point(s) of interest in the microprocessor, such as the package impedance. The package impedance is particularly relevant for devices that are provided in a variety of package types.
Another limitation of this technique is that the data obtained is only relevant for the PCB that the microprocessor is loaded onto. Another PCB for the same electronic system might have different impedance due to manufacturing tolerances and variance in the loaded components. A PCB having a different layout and different components (such as different power supplies) would almost certainly have different impedance.
Therefore, it is desirable to more accurately characterize PDSs. It is further desirable to characterize PDSs for use with semiconductor devices in a variety of electronic systems and semiconductor dice in a variety of device packages, and to characterize the expected operation of a semiconductor device in an electronic system.